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71V124S15Y IDT 3.3V CMOS Static RAM. 1 Meg (128K x 8-Bit). JEDEC revolutionary pinout (center power/GND) for reduced noise. Bidirectional inputs and outputs directly LVTTL-compatible. Low power consumption via chip deselect. 32-pin plastic SOJ package.
The IDT71V124 has an output enable pin which operates as fast as 7ns, with address access times as fast as 15ns available. All bidirectional inputs and outputs of the IDT71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. The IDT71V124 is packaged in 32-pin 400 mil Plastic SOJ.
IDT71V124S15Y
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PQ: 4 | PWIP: | REF: 15